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FET Common Source Amplifier Lab Notes, Page 3






Related experiment notes and graphics:

Lab Notes and Graphics
Figure 1: Mag. Plot for Modified Circuit
Figure 2: Phase Plot for Modified Circuit
Figure 3: Mag. Plot of High Frequency Modified Circuit
Figure 4: Phase Plot of High Frequency Modified Circuit
Lab Notes Page 1 of 4
Lab Notes Page 2 of 4
Lab Notes Page 3 of 4
Lab Notes Page 4 of 4
PSpice and Simulations
Pspice Simulation Graph 1
Pspice Simulation Graph 2
Pspice Simulation Graph 3
Pspice Simulation Graph 4
Pspice Simulation Graph 5
Pspice Simulation Graph 6
Pspice Simulation Graph 7
Pspice Simulation Graph 8

Lab measurements and mathematical solutions for frequency vs. gain (dB) response and drain to source, gate to source, and gate to drain capacitance. Total circuit network capacitance and roll off frequencies defined by zero and pole. This graphic image maybe used for publications, web sites, or any print or electronic media with the express intent that the image is not altered and the author properly sited. You agree to these conditions upon any use of this image.


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