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Frequency Response of FET Common Source Amplifier Lab

Laboratory experiment using a self-biased common-source JFET amplifier to identify break frequencies, poles and zeros, Bode plots, and common source amplifier characteristics. Junction Field Effect Transistor (JFET) behavior presented in the lecture course Analog and Semiconductor Devices is verified using the lab experiment, calculations, and PSPICE simulations.

Procedure:

1. Using the circuit of Figure 1, predict the low frequency break frequencies (4).
2. Modify the circuit to provide the following:
a. fpoleC2 = 10 kHz
b. fpoleC1 = 1 kHz
c. fzeroCS = 25 kHz
d. calculate fpoleCS (can be calculated after Cs is determined in (c) above)






3. Draw a Bode plot (voltage gain and phase) for the modified circuit over a frequency range of 1 Hz to 1 MHz.

4. Perform PSPICE analysis for frequency response of the modified circuit over a frequency range of 1 Hz to 1 MHz. Assemble the circuit and measure the frequency response over the same range.

5. Compare the results of steps 3 and 4 by superimposing the measured results and Bode plot on the frequency response curves obtained from PSPISE probe (or vice versa).

6. Return the circuit to its original form (C1 = C2 = 4.7F, Cs = 100F).

7. Calculate the high frequency break frequencies (2) for the circuit:
a. without any instruments connected to it, and
b. with 10X oscilloscope probes simultaneously connected to the gate of the FET and across RL.

8. Modify the circuit to provide the following:
a. fpoleCA = 800 kHz
b. fpoleCB = 50 kHz

9. Repeat steps 3, 4, and 5 over a frequency range of 1 kHz to 10 Mhz.


Procedure & Data:

1. In the given experiment the characteristics of a Junction Field Effect Transistor, the JFET's Frequency Response was examined over a large frequency range. First hand calculations were performed and a small signal model was created to determine the expected output characteristics. Next the circuit was modified to given high and low frequencies, capacitor values and gain were then determined. This allowed for a more precise and accurate plot of the high and low frequency breaks. Once an expected mathematical understanding was determined a graphical bode plot of the voltage gain and phase was created over a frequency range of 1Hz to 1MHz.

Next Pspice simulations were ran over a frequency range of 10Hz to 1MHz and compared to the bode plots confirming the hand calculations. Once both the Pspice and body plots agreed the circuit was then constructed in a laboratory setting for final testing. Data was then taken from the constructed circuit and compared to the previous calculated values (table 1). Finally the graphical plots were superimposed and compared.


Table 1: JFET Common Source Frequency Response for Low Frequency vs. Gain.


The next step in the analysis of the Junction Field Effect Transistors, the JFET's frequency response was to return the circuit to its original configurations. Calculations were now developed for the high frequency range of the original configuration. Once complete, the internal capacitance of the scope probe needed to be taken into considerations.


The probe was measured and determined to have an internal capacitance of 15pF. This was then considered and examined while measurements were gathered.

The circuit was then modified for given high frequency values where the capacitors again needed to be calculated. Once the devices input and output capacitance was determined the circuit was constructed, measurements were taken and recorded (table 2). Bode plots and Pspice graphical analysis were developed and the output was then superimposed for examination. Again the frequency range was examined over 1kHz to 10MHz.


Table 2: JFET Common Source Frequency Response for High Frequency vs. Gain.


Conclusion & Discoveries:

Oscilloscope probes have internal capacitance that must be accounted for when examining the frequency response of a specified device. Without the proper specifications for the test equipment, one may measure inaccurate results for the test being performed.

The use of creating a small signal model provides one to more easily determine the characteristics by inspection. These models allow ease of analysis and provides a greater understanding of the behavior of the Junction Field Effect Transistors, JFETs.

It was discovered when modifying the given circuits one must only change the capacitance and not the resistance of the circuit. By changing any values of resistance the DC biasing and output resistance seen by the load will change and intern result in a completely different circuit.

In closing, by examining the frequency response of a common source amplifier and the characteristics of the gain, a better understanding of the JFET's characteristics and applications was learned. By varying the capacitance values of the circuit an amplifier can be designed for a specified frequency range. Therefore, the development of a specific amplifier device can be achieved.


Lab Notes and Graphics
Figure 1: Mag. Plot for Modified Circuit
Figure 2: Phase Plot for Modified Circuit
Figure 3: Mag. Plot of High Frequency Modified Circuit
Figure 4: Phase Plot of High Frequency Modified Circuit
Lab Notes Page 1 of 4
Lab Notes Page 2 of 4
Lab Notes Page 3 of 4
Lab Notes Page 4 of 4
PSpice and Computer Simulations
Pspice Graph 1
Pspice Graph 2
Pspice Graph 3
Pspice Graph 4
Pspice Graph 5
Pspice Graph 6
Pspice Graph 7
Pspice Graph 8

Electrical Engineering lab key words: FET Common Source Amplifier, Self Biasing, Junction Field Effect Transistor, JFET characteristics, JFET biasing, JFET output, Bode Plot, Poles, Zeros, Q-Point, common source output characteristics, FET measurements, transfer characteristics, drain, gate, source, transresistance, transconductance, and differential amplifiers. Offset voltage, bias current, offset current, two port models, frequency response, transfer functions, nonlinear devices.

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